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| 1. | IC³]pÃþ - Embedded DRAM Design Engineers | The successful candidate will be responsible for high density embedded DRAM design | 3 | ²z¤u/¸ê°T¾Ç¸s¹q¾÷¤uµ{Ãþ
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| 2. | ´¹¶ê»s³yÃþ - ¸ê²`¼t°È³]p¤uµ{®v -Electrical | 1. ¼t°È¨t²Î³]p.
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| 3. | ¬ãµoÃþ(Research & Development) ¡V Product Engineer_Flash Memory | The role is responsible for
1. Flash product characterization
2. Failure analysis, electrical and phsical
3. Yield improvement
4. Development and service of systems and methodology
5. Device and SPICE related affairs
Requirements
1. Minimum Master degree in EE, Material Science, Physics or IT(C++ / VB).
2. Preferable with experiences in Flash / Memory product engineering, device engineering, factory integration engineering and testing engineering.
3. Preferable with experiences in IT programming and system development.
4. Additional experiences in circuit design would be a plus
5. Must be familiar with operations of Product analysis tools, EDX, EELS, TEM etc., and with machine languages like BCB, C/C++, VB, SQL, DB, PERL etc.
6. Fluent in English
| 5 | ²z¤u/¸ê°T¾Ç¸s
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| 4. | ¸ê°T¤uµ{Ãþ - Principal Application Archtect | The role is responsible for
1. Business End to End related system integration
2. Application Architect | 2 | ¤£©ë
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| 5. | ©`¦Ì»k¨è§Þ³N¤uµ{®v(«n¬ì) | 1. ȯZ (§t¤é©]¤Î°²¤é½ü¯Z).
2. ¾÷¥x¯à¤O´£¤É¤Î§ïµ½.
3. ¾÷¥xºûפθѨM¾÷¥x²§±`. | 1 | ²z¤u/¸ê°T¾Ç¸s¹q¾÷¤uµ{Ãþ
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| 6. | ¥DºÞÃþ-IC³]p¥DºÞ(Layout CAD Manager) | > 1). Bachelor or higher degree majoring in EE or computer engineering
> 2). At lease 7 years of experience in EDA/CAD or beck-end design flow
> 3). Familiar with EDA tools: APR tools, Laker, Virtuoso, Calibre
> 4). Need to have programming capability, such as Perl and C++
> 5). Good at TCL will be advantageous | 1 | ²z¤u/¸ê°T¾Ç¸s
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Received on Mon Jul 23 2007 - 01:49:57 EDT